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IO13PDB0V0 bảng dữ liệu(PDF) 179 Page - Microsemi Corporation |
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IO13PDB0V0 bảng dữ liệu(HTML) 179 Page - Microsemi Corporation |
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179 / 197 page ![]() SmartFusion Customizable System-on-Chip (cSoC) Re vi s i on 12 5 - 65 U13 NC GNDTM2 U14 NC ADC11 U15 GNDVAREF GNDVAREF U16 VCC33SDD1 VCC33SDD1 U17 SPI_0_DO/GPIO_16 SPI_0_DO/GPIO_16 U18 UART_0_RXD/GPIO_21 UART_0_RXD/GPIO_21 U19 VCCMSSIOB2 VCCMSSIOB2 U20 I2C_1_SCL/GPIO_31 I2C_1_SCL/GPIO_31 U21 I2C_0_SCL/GPIO_23 I2C_0_SCL/GPIO_23 U22 GND GND V1 GPIO_0/IO47RSB4V0 GPIO_0/IO56RSB4V0 V2 GPIO_6/IO41RSB4V0 GPIO_6/IO50RSB4V0 V3 GPIO_9/IO38RSB4V0 GPIO_9/IO47RSB4V0 V4 MAC_MDIO/IO49RSB4V0 MAC_MDIO/IO58RSB4V0 V5 MAC_RXD[0]/IO54RSB4V0 MAC_RXD[0]/IO63RSB4V0 V6 GND GND V7 SDD0 SDD0 V8 ABPS1 ABPS1 V9 ADC2 ADC2 V10 VCC33ADC0 VCC33ADC0 V11 ADC6 ADC6 V12 ADC5 ADC5 V13 ABPS5 ABPS5 V14 NC ADC8 V15 NC GND33ADC2 V16 NC NC V17 GND GND V18 SPI_0_DI/GPIO_17 SPI_0_DI/GPIO_17 V19 SPI_1_DI/GPIO_25 SPI_1_DI/GPIO_25 V20 UART_1_TXD/GPIO_28 UART_1_TXD/GPIO_28 V21 I2C_0_SDA/GPIO_22 I2C_0_SDA/GPIO_22 V22 I2C_1_SDA/GPIO_30 I2C_1_SDA/GPIO_30 W1 GPIO_2/IO45RSB4V0 GPIO_2/IO54RSB4V0 W2 GPIO_7/IO40RSB4V0 GPIO_7/IO49RSB4V0 Pin Number FG484 A2F200 Function A2F500 Function Notes: 1. Shading denotes pins that do not have completely identical functions from density to density. For example, the bank assignment can be different for an I/O, or the function might be available only on a larger density device. 2. *: Indicates that the signal assigned to the pins as a CLKBUF/CLKBUF_LVPECL/CLKBUF_LVDS goes through a glitchless mux. In order for the glitchless mux to operate correctly, the signal must be a free-running clock signal. Refer to the ’Glitchless MUX’ section in the SmartFusion Microcontroller Subsystem User’s Guide for more details. |
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