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IO13PDB0V0 bảng dữ liệu(PDF) 102 Page - Microsemi Corporation |
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IO13PDB0V0 bảng dữ liệu(HTML) 102 Page - Microsemi Corporation |
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102 / 197 page ![]() SmartFusion DC and Switching Characteristics 2- 90 R e v i sio n 1 2 Inter-Integrated Circuit (I2C) Characteristics This section describes the DC and switching of the I2C interface. Unless otherwise noted, all output characteristics given are for a 100 pF load on the pins. For timing parameter definitions, refer to Figure 2- 48 on page 2-91. Table 2-101 • I2C Characteristics Commercial Case Conditions: TJ = 85ºC, VDD = 1.425 V, –1 Speed Grade Parameter Definition Condition Value Unit VIL Minimum input low voltage – SeeTable 2-36 on page 2-30 – Maximum input low voltage – See Table 2-36 – VIH Minimum input high voltage – See Table 2-36 – Maximum input high voltage – See Table 2-36 – VOL Maximum output voltage low IOL =8mA See Table 2-36 – IIL Input current high – See Table 2-36 – IIH Input current low – See Table 2-36 – Vhyst Hysteresis of Schmitt trigger inputs – See Table 2-33 on page 2-29 V TFALL Fall time 2 VIHmin to VILMax, Cload = 400 pF 15.0 ns VIHmin to VILMax, Cload = 100 pF 4.0 ns TRISE Rise time 2 VILMax to VIHmin, Cload = 400pF 19.5 ns VILMax to VIHmin, Cload = 100pF 5.2 ns Cin Pin capacitance VIN = 0, f = 1.0 MHz 8.0 pF Rpull-up Output buffer maximum pull- down Resistance 1 –50 Ω Rpull-down Output buffer maximum pull-up Resistance 1 – 150 Ω Dmax Maximum data rate Fast mode 400 Kbps tLOW Low period of I2C_x_SCL 3 – 1 pclk cycles tHIGH High period of I2C_x_SCL 3 – 1 pclk cycles tHD;STA START hold time 3 – 1 pclk cycles tSU;STA START setup time 3 – 1 pclk cycles tHD;DAT DATA hold time 3 – 1 pclk cycles tSU;DAT DATA setup time 3 – 1 pclk cycles Notes: 1. These maximum values are provided for information only. Minimum output buffer resistance values depend on VCCxxxxIOBx, drive strength selection, temperature, and process. For board design considerations and detailed output buffer resistances, use the corresponding IBIS models located on the SoC Products Group website at http://www.microsemi.com/index.php?option=com_microsemi&Itemid=489&lang=en&view=salescontact. 2. These values are provided for a load of 100 pF and 400 pF. For board design considerations and detailed output buffer resistances, use the corresponding IBIS models located on the SoC Products Group website at http://www.microsemi.com/index.php?option=com_microsemi&Itemid=489&lang=en&view=salescontact. 3. For allowable Pclk configurations, refer to the Inter-Integrated Circuit (I2C) Peripherals section in the SmartFusion Microcontroller Subsystem User’s Guide. |
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