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CS4215 bảng dữ liệu(PDF) 29 Page - Cirrus Logic

tên linh kiện CS4215
Giải thích chi tiết về linh kiện  16-Bit Multimedia Audio Codec
PDF  52 Pages
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nhà sản xuất  CIRRUS [Cirrus Logic]
Trang chủ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4215 bảng dữ liệu(HTML) 29 Page - Cirrus Logic

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placed closest to the codec. Vias are placed near
the AGND and DGND pins, under the IC, and
should be attached to the solid analog ground
plane on another layer. The negative side of the
decoupling capacitors should also attach to the
same solid ground plane. Traces bringing the
power to the codec should be wide thereby keep-
ing the impedance low.
Although not shown in the figures, the trace lay-
ers (top layer in the figures) should have ground
plane fill in-between the traces to minimize cou-
pling into the analog section. See the CDB4215
evaluation board data sheet for an example lay-
out.
If using all surface-mount components, the de-
coupling capacitors should still be placed on the
layer with the codec and in the positions shown
in Figure 20. The vias shown are assumed to at-
tach to the appropriate power and analog ground
layers. Traces bringing power to the codec
should be as wide as possible to keep the imped-
ance low. For the same reason, vias should be
large for power and ground runs.
If using through-hole sockets, effort should be
made to find a socket with the minimum height
which will minimize the socket impedance.
When using a through-hole socket, the vias un-
der the codec in Figure 19 are not needed since
the pins serve the same function.
ADC and DAC Filter Response Plots
Figures 21 through 27 show the overall fre-
quency response, passband ripple and transition
band for the CS4215 ADCs and DACs. Fig-
ure 27 shows the DACs’ deviation from linear
phase. Fs is the selected sample frequency. Since
the sample frequency is programmable, the fil-
ters will adjust to the selected sample frequency.
Fs is also the FSYNC frequency.
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
Input Frequency (Fs)
Figure 21. ADC Frequency Response
0.0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50
Input Frequency (Fs)
-0.8
-0.7
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
-0.0
0.1
0.2
Figure 22. ADC Passband Ripple
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0.40 0.42 0.44 0.46 0.48 0.50 0.52 0.54 0.56 0.58 0.60
Input Frequency (Fs)
Figure 23. ADC Transition Band
CS4215
DS76F2
29



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