VMV3 datasheet(47/212 Pages) MICROSEMI

tên linh kiện	VMV3

Giải thích chi tiết về linh kiện	Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology

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nhà sản xuất	MICROSEMI [Microsemi Corporation]

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Military ProASIC3/EL Low Power Flash FPGAs

Revision 3

2-33

Table 2-36 • I/O Output Buffer Maximum Resistances 1

Applicable to Advanced I/O Banks for A3P250 and A3P1000 Only

Standard

Drive Strength

RPULL-DOWN

(

) 2

RPULL-UP

(

) 3

3.3 V LVTTL / 3.3 V LVCMOS

2 mA

100

300

4 mA

100

300

6 mA

150

8 mA

150

12 mA

16 mA

24 mA

3.3 V LVCMOS Wide Range

100 µA

Same as regular 3.3 V LVCMOS

2.5 V LVCMOS

2 mA

100

300

4 mA

100

300

6 mA

150

8 mA

150

12 mA

16 mA

24 mA

1.8 V LVCMOS

2 mA

100

200

4 mA

100

200

6 mA

100

8 mA

100

12 mA

16 mA

1.5 V LVCMOS

2 mA

200

224

4 mA

100

112

6 mA

8 mA

12 mA

3.3 V PCI/PCI-X

Per PCI/PCI-X specification

Notes:

1. These maximum values are provided for informational reasons only. Minimum output buffer resistance values depend

on VCCI, drive strength selection, temperature, and process. For board design considerations and detailed output buffer

resistances, use the corresponding IBIS models located at http://www.actel.com/download/ibis/default.aspx.

2. R(PULL-DOWN-MAX) = (VOLspec) / IOLspec

3. R(PULL-UP-MAX) = (VCCImax – VOHspec) / IOHspec

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