AD9974BBCZ datasheet(43/52 Pages) AD

43 / 52 page

AD9974

Rev. A | Page 43 of 52

Address

Data Bit

Content

Default

Value

Update

Name

Description

0x0C

[27:0]

TESTMODE

Test Operation Only. Set to 0 if this register is accessed.

0x0D

[0]

CLIDIVIDE

CLI Divide.

1 = divide CLI input frequency by 2.

[3:1]

TESTMODE

Test Operation Only. Set to 0.

[27:4]

Unused

Set unused bits to 0.

0x0E

[27:0]

SCK

Unused

Set unused register to 0 if accessed.

0x0F

[27:0]

SCK

Unused

Set unused register to 0 if accessed.

Table 23. Miscellaneous Registers

Address

Data Bit

Content

Default

Value

Update

Name

Description

0x10

[0]

SCK

SW_RST

Software Reset. Bit self-clears to 0 when a reset occurs.

1 = reset Address 0x00 to Address 0xFF to default values.

[27:1]

Unused

Set unused bits to 0.

0x11

[0]

OUT_CONTROL

Output Control.

0 = make all outputs dc inactive.

1 = enable outputs at next VD edge.

[27:1]

Unused

Set unused bits to 0.

0x12

[1:0]

SCK

TESTMODE

Test Operation Only. Set to 0.

[27:2]

Unused

Set unused bits to 0.

0x13

[0]

SCK

TESTMODE

Test Operation Only. Set to 0.

[27:1]

Unused

Set unused bits to 0.

0x14

[0]

SCK

TGCORE_RST

Timing Core Reset Bar.

0 = hold in reset.

1 = resume operation.

[27:1]

Unused

Set unused bits to 0.

0x15

[0]

SCK

CLI_BIAS

Enable bias for CLI input (see Figure 11).

0 = disable bias (CLI input is dc-coupled).

1 = enable bias (CLI input is ac-coupled).

[27:1]

Unused

Set unused bits to 0.

0x16

[0]

SCK

TESTMODE

Test Operation Only. Set to 0.

[27:1]

Unused

Set unused bits to 0.

0x17

[12:0]

SCK

UPDATE

Serial Interface Update Line. Sets the line (HD) within the field to

update the VD-updated registers. Disabled when PREVENTUP = 1.

[13]

PREVENTUP

Prevents normal update of VD-updated registers.

0 = normal update at VD.

1 = prevent update of VD-updated registers.

[27:14]

Unused

Set unused bits to 0.

0x18

[27:0]

TESTMODE

Test Operation Only. Set to 0 if this register is accessed.

0x19

[27:0]

TESTMODE

Test Operation Only. Set to 0 if this register is accessed.

0x1A to

0x1F

[27:0]

Unused

Set unused bits to 0.

Table 24. VD/HD Registers

Address

Data Bit

Content

Default

Value

Update

Name

Description

0x20

[0]

SCK

TESTMODE

Test Operation Only. Set to 0.

[27:1]

Unused

Set unused bits to 0.

0x21

[0]

SCK

VDHDPOL

VD/HD Active Polarity.

0 = active low.

1 = active high.

[2:1]

TESTMODE

Test Operation Only. Set to 0.

[27:3]

Unused

Set unused bits to 0.

0x22

[27:0]

TESTMODE

Test Operation Only. Set to 0 if this register is accessed.

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