AD9974BBCZ datasheet(36/52 Pages) AD

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AD9974

Rev. A | Page 36 of 52

STANDBY MODE OPERATION

The AD9974 contains two standby modes to optimize the

overall power dissipation in a particular application. Bit 1 and

Bit 0 of Address 0x00 control the power-down state of the device.

STANDBY[1:0] = 00 = normal operation (full power)

STANDBY[1:0] = 01 = reference standby mode

STANDBY[1:0] = 10 or 11 = total shutdown mode

(lowest power)

Table 20 summarizes the operation of each power-down mode.

The OUT_CONTROL register takes priority over the reference

standby mode in determining the digital output states, but total

shutdown mode takes priority over OUT_CONTROL. Total

shutdown mode has the lowest power consumption.

When returning from total shutdown mode to normal operation,

the timing core must be reset at least 100 μs after the STANDBY

There is an additional register to disable the internal voltage

reference buffer (Address 0x00[2]) independently. By default

the buffer is disabled, but it must be enabled for normal operation.

CLI FREQUENCY CHANGE

If the input clock, CLI, is interrupted or changes to a different

frequency, the timing core must be reset for proper operation.

After the CLI clock has settled to the new frequency, or the

previous frequency has resumed, write 0 and then 1 to the

TGCORE_RST register (Address 0x14). This guarantees proper

timing core operation.

Table 20. Standby Mode Operation

I/O Block

Total Shutdown (Default)1, 2

OUT_CONTROL = Low2

Reference Standby

AFE

Off

No change

Only REFT, REFB on

Timing Core

Off

No change

High-Z

Low

Low (4.3 mA)

High-Z

High

High (4.3 mA)

High-Z

Low

Low (4.3 mA)

High-Z

High

High (4.3 mA)

High-Z

Low

Low (4.3 mA)

High-Z

Low

Low (4.3 mA)

DOUT

Low3

Low

1 To exit total shutdown, write 00 to STANDBY (Address 0x00, Bits[1:0]), then reset the timing core after 100 μs to guarantee proper settling.

2 Total shutdown mode takes priority over OUT_CONTROL for determining the output polarities.

3 The status of the DOUT pins is unknown at power-up. Low status is guaranteed in total shutdown mode after the power-up sequence is completed.

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