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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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PIC16F87 bảng dữ liệu(PDF) 178 Page - Microchip Technology |
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PIC16F87 bảng dữ liệu(HTML) 178 Page - Microchip Technology |
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178 / 230 page  PIC16F87/88 DS30487D-page 178 2002-2013 Microchip Technology Inc. FIGURE 18-5: CLKO AND I/O TIMING TABLE 18-4: CLKO AND I/O TIMING REQUIREMENTS Note: Refer to Figure 18-3 for load conditions. OSC1 CLKO I/O Pin (Input) I/O Pin (Output) Q4 Q1 Q2 Q3 10 13 14 17 20, 21 19 18 15 11 12 16 Old Value New Value Param No. Symbol Characteristic Min Typ† Max Units Conditions 10* TosH2ckL OSC1 to CLKO — 75 200 ns (Note 1) 11* TosH2ckH OSC1 to CLKO — 75 200 ns (Note 1) 12* TckR CLKO Rise Time — 35 100 ns (Note 1) 13* TckF CLKO Fall Time — 35 100 ns (Note 1) 14* TckL2ioV CLKO to Port Out Valid — — 0.5 TCY + 20 ns (Note 1) 15* TioV2ckH Port In Valid before CLKO TOSC + 200 — — ns (Note 1) 16* TckH2ioI Port In Hold after CLKO 0— — ns (Note 1) 17* TosH2ioV OSC1 (Q1 cycle) to Port Out Valid — 100 255 ns 18* TosH2ioI OSC1 (Q2 cycle) to Port Input Invalid (I/O in hold time) PIC16F87/88 100 — — ns PIC16LF87/88 200 — — ns 19* TioV2osH Port Input Valid to OSC1 (I/O in setup time) 0 — — ns 20* TIOR Port Output Rise Time PIC16F87/88 — 10 40 ns PIC16LF87/88 — — 145 ns 21* TIOF Port Output Fall Time PIC16F87/88 — 10 40 ns PIC16LF87/88 — — 145 ns 22††* TINP INT Pin High or Low Time TCY —— ns 23††* TRBP RB7:RB4 Change INT High or Low Time TCY —— ns * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. †† These parameters are asynchronous events not related to any internal clock edges. Note 1: Measurements are taken in RC mode where CLKO output is 4 x TOSC. |
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