PIC16F87 datasheet(57/230 Pages) MICROCHIP

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DS30487D-page 57

PIC16F87/88

5.2

PORTB and the TRISB Register

PORTB is an 8-bit wide, bidirectional port. The corre-

sponding data direction register is TRISB. Setting a

TRISB bit (= 1) will make the corresponding PORTB

pin an input (i.e., put the corresponding output driver in

a high-impedance mode). Clearing a TRISB bit (= 0)

will make the corresponding PORTB pin an output (i.e.,

put the contents of the output latch on the selected pin).

Each of the PORTB pins has a weak internal pull-up. A

single control bit can turn on all the pull-ups. This is

performed by clearing bit RBPU (OPTION_REG<7>).

The weak pull-up is automatically turned off when the

port pin is configured as an output. The pull-ups are

disabled on a Power-on Reset.

Four of PORTB’s pins, RB7:RB4, have an interrupt-on-

change feature. Only pins configured as inputs can

cause this interrupt to occur (i.e., any RB7:RB4 pin

configured as an output is excluded from the interrupt-

on-change comparison). The input pins (of RB7:RB4)

are compared with the old value latched on the last

read of PORTB. The “mismatch” outputs of RB7:RB4

are OR’ed together to generate the RB Port Change

Interrupt with Flag bit RBIF (INTCON<0>).

This interrupt can wake the device from Sleep. The

user, in the Interrupt Service Routine, can clear the

interrupt in the following manner:

Any read or write of PORTB. This will end the

mismatch condition.

Clear flag bit RBIF.

A mismatch condition will continue to set flag bit RBIF.

Reading PORTB will end the mismatch condition and

allow flag bit RBIF to be cleared.

The interrupt-on-change feature is recommended for

wake-up on key depression operation and operations

where PORTB is only used for the interrupt-on-change

feature. Polling of PORTB is not recommended while

using the interrupt-on-change feature.

RB0/INT is an external interrupt input pin and is

configured using the INTEDG bit (OPTION_REG<6>).

PORTB is multiplexed with several peripheral functions

(see Table 5-3). PORTB pins have Schmitt Trigger

input buffers.

When enabling peripheral functions, care should be

taken in defining TRIS bits for each PORTB pin. Some

peripherals override the TRIS bit to make a pin an

output, while other peripherals override the TRIS bit to

make a pin an input. Since the TRIS bit override is in

effect while the peripheral is enabled, read-modify-

write instructions (BSF, BCF, XORWF) with TRISB as

the destination should be avoided. The user should

refer to the corresponding peripheral section for the

correct TRIS bit settings.

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