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PIC16F87 bảng dữ liệu(PDF) 129 Page - Microchip Technology |
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PIC16F87 bảng dữ liệu(HTML) 129 Page - Microchip Technology |
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129 / 230 page ![]() 2002-2013 Microchip Technology Inc. DS30487D-page 129 PIC16F87/88 15.0 SPECIAL FEATURES OF THE CPU These devices have a host of features intended to max- imize system reliability, minimize cost through elimina- tion of external components, provide power-saving operating modes and offer code protection: • Reset - Power-on Reset (POR) - Power-up Timer (PWRT) - Oscillator Start-up Timer (OST) - Brown-out Reset (BOR) • Interrupts • Watchdog Timer (WDT) • Two-Speed Start-up • Fail-Safe Clock Monitor • Sleep • Code Protection • ID Locations • In-Circuit Serial Programming™ (ICSP™) There are two timers that offer necessary delays on power-up. One is the Oscillator Start-up Timer (OST), intended to keep the chip in Reset until the crystal oscillator is stable. The other is the Power-up Timer (PWRT), which provides a fixed delay of 72 ms (nomi- nal) on power-up only. It is designed to keep the part in Reset while the power supply stabilizes and is enabled or disabled using a configuration bit. With these two timers on-chip, most applications need no external Reset circuitry. Sleep mode is designed to offer a very low-current Power-down mode. The user can wake-up from Sleep through external Reset, Watchdog Timer wake-up or through an interrupt. Additional information on special features is available in the “PIC® Mid-Range MCU Family Reference Man- ual” (DS33023). 15.1 Configuration Bits The configuration bits can be programmed (read as ‘0’), or left unprogrammed (read as ‘1’), to select various device configurations. These bits are mapped in program memory locations 2007h and 2008h. The user will note that address 2007h is beyond the user program memory space which can be accessed only during programming. |
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