LPC810M021FN8 datasheet(91/313 Pages) NXP

91 / 313 page

UM10601

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Preliminary user manual

Rev. 1.0 — 7 November 2012

91 of 313

NXP Semiconductors

UM10601

Chapter 8: LPC800 Pin interrupts/pattern match engine

Remark:

Set up the pattern-match configuration in the PMSRC and PMCFG registers

before writing to this register to enable (or re-enable) the pattern-match functionality. This

eliminates the possibility of spurious interrupts as the feature is being enabled.

8.6.12 Pattern Match Interrupt Bit-Slice Source register

The bit-slice source register specifies the input source for each of the eight pattern match

bit slices.

Each of the possible eight inputs is selected in the pin interrupt select registers in the

SYSCON block. See Section 4.6.27. Input 0 corresponds to the pin selected in the

PINTSEL0 register, input 1 corresponds to the pin selected in the PINTSEL1 register, and

so forth.

Remark:

Writing any value to either the PMCFG register or the PMSRC register, or

disabling the pattern-match feature (by clearing both the SEL_PMATCH and ENA_RXEV

bits in the PMCTRL register to zeros) will erase all edge-detect history.

Table 90.

Pattern match interrupt control register (PMCTRL, address 0x4004 C028)

bit description

Bit

Symbol

Value

Description

Reset

value

SEL_PMATCH

Specifies whether the 8 pin interrupts are controlled by

the pin interrupt function or by the pattern match

function.

Pin interrupt. Interrupts are driven in response to the

standard pin interrupt function

Pattern match. Interrupts are driven in response to

pattern matches.

ENA_RXEV

Enables the RXEV output to the ARM cpu and/or to a

GPIO output when the specified boolean expression

evaluates to true.

Disabled. RXEV output to the cpu is disabled.

Enabled. RXEV output to the cpu is enabled.

23:2

Reserved. Do not write 1s to unused bits.

31:24 PMAT

This field displays the current state of pattern matches.

A 1 in any bit of this field indicates that the

corresponding product term is matched by the current

state of the appropriate inputs.

0x0

Table 91.

Pattern match bit-slice source register (PMSRC, address 0x4004 C02C)

bit description

Bit

Symbol

Value

Description

Reset value

7:0

Reserved

Software should not write 1s to unused bits.

0x0

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