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LPC810M021FN8 bảng dữ liệu(PDF) 80 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  LPC800 User manual
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LPC810M021FN8 bảng dữ liệu(HTML) 80 Page - NXP Semiconductors

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UM10601
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Preliminary user manual
Rev. 1.0 — 7 November 2012
80 of 313
NXP Semiconductors
UM10601
Chapter 7: LPC800 GPIO port
7.6.9 GPIO port toggle registers
Output bits can be toggled/inverted/complemented by writing ones to these write-only
registers, regardless of MASK registers.
7.7 Functional description
7.7.1 Reading pin state
Software can read the state of all GPIO pins except those selected for analog input or
output in the “I/O Configuration” logic. A pin does not have to be selected for GPIO in “I/O
Configuration” in order to read its state. There are several ways to read the pin state:
• The state of a single pin can be read with 7 high-order zeros from a Byte Pin register.
• The state of a single pin can be read in all bits of a byte, halfword, or word from a
Word Pin register.
• The state of multiple pins in a port can be read as a byte, halfword, or word from a
PORT register.
• The state of a selected subset of the pins in a port can be read from a Masked Port
(MPORT) register. Pins having a 1 in the port’s Mask register will read as 0 from its
MPORT register.
7.7.2 GPIO output
Each GPIO pin has an output bit in the GPIO block. These output bits are the targets of
write operations “to the pins”. Two conditions must be met in order for a pin’s output bit to
be driven onto the pin:
1. The pin must be selected for GPIO operation in the switch matrix.
2. The pin must be selected for output by a 1 in its port’s DIR register.
If either or both of these conditions is (are) not met, writing to the pin has no effect.
There are multiple ways to change GPIO output bits:
Table 76.
GPIO clear port 0 register (CLR0, address 0xA000 2280) bit description
Bit
Symbol
Description
Reset
value
Access
17:0
CLRP0
Clear output bits:
0 = No operation.
1 = Clear output bit.
NA
WO
31:18
-
Reserved.
0
-
Table 77.
GPIO toggle port 0 register (NOT0, address 0xA000 2300) bit description
Bit
Symbol Description
Reset
value
Access
17:0
NOTP0
Toggle output bits:
0 = no operation.
1 = Toggle output bit.
NA
WO
31:18 -
Reserved.
0
-



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