L99PM62XP datasheet(93/98 Pages) STMICROELECTRONICS

93 / 98 page

L99PM62XP

ST SPI

Doc ID 16363 Rev 3

93/98

Status register 3

Table 100.

Status register 3: command and data bytes

Command byte

1st data byte

2nd data byte

Read/write

Address

Bit <15:8>

Bit<7:0>

010

011

Data, 8bit

Data, 8 bit

Table 101.

Status register 3, data bytes

1st data byte <15:8>

2nd data byte <7:0>

Function

TSD1 TW

Device

state_2

Device

state_1

fail

restart_2

restart_1

restart_0

fail_3

fail_2

fail_1

fail_0

Forced

sleep

Forced

sleep

TSD2

SHTV1

timer

state_1

timer

state_0

Group

Diagnosis 5

Diagnosis 6

Table 102.

Status register 3, bits

Bit

Name

Comment

Information storage

TSD1

Thermal warning / shutdown1 occurred since last readout

Bit is latched until a

“read and clear access”

Device_state

State from which the device woke up

Bit is latched until a

“read and clear access”

after a “read and clear

access”, the device

state is updated

after a wake up, device

state is

01: V1 standby

10: VBAT standby

Device state_2

Device state_1

State from

which the

device woke

Active

V1 standby

VBAT standby

Flash

V1_fail

V1 fail (V1 < 2 V for t > 2 µs) event occurred since last read out

Bit is latched until a

“read and clear access”

V1_restart_2

Number of TSD2 events which caused a restart of V1

regulator

(7 TSD2 events forces the device into VBAT standby)

Bits are not clearable;

is cleared automatically

if no additional TSD2

event occurs within 1

min.

9V1_restart_1

8V1_restart_0

7WD_fail_3

Number of missing watchdog triggers

(15 missing watchdog trigger forces the device into VBAT

standby)

Bits are not clearable;

is cleared with a proper

Watchdog trigger

6WD_fail_2

5WD_fail_1

4WD_fail_0

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