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ST10F280 bảng dữ liệu(PDF) 153 Page - STMicroelectronics |
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ST10F280 bảng dữ liệu(HTML) 153 Page - STMicroelectronics |
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153 / 239 page ![]() ST10F280 Serial channels Doc ID 8673 Rev. 3 153/239 Figure 58. Synchronous serial channel SSC block diagram 14.2.1 Baud rate generation The Baud rate generator is clocked by fCPU/2. The timer is counting downwards and can be started or stopped through the global enable Bit SSCEN in register SSCCON. Register SSCBR is the dual-function Baud Rate Generator/Reload register. Reading SSCBR, while the SSC is enabled, returns the content of the timer. Reading SSCBR, while the SSC is disabled, returns the programmed reload value. In this mode the desired reload value can be written to SSCBR. Note: Never write to SSCBR, while the SSC is enabled. The formulas below calculate the resulting Baud rate for a given reload value and the required reload value for a given Baud rate: (SSCBR) represents the content of the reload register, taken as unsigned 16 Bit integer. Table 30 lists some possible Baud rates against the required reload values and the resulting bit times for a 40MHz CPU clock. Baud rateSSC = fCPU 2 x [(SSCBR) + 1] SSCBR = ( fCPU 2 x Baud rateSSC ) 1 |
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