ST10F280_12 datasheet(103/239 Pages) STMICROELECTRONICS

tên linh kiện	ST10F280

Giải thích chi tiết về linh kiện	16-bit MCU with MAC unit, 512 Kbyte Flash memory and 18 Kbyte RAM

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ST10F280

Parallel ports

Doc ID 8673 Rev. 3

103/239

intra-segment address or the 8/16-bit data information. The incoming data on PORT0 is

read on the line “Alternate Data Input”. While an external bus mode is enabled, the user

software should not write to the port output latch, otherwise unpredictable results may occur.

When the external bus modes are disabled, the contents of the direction register last written

by the user becomes active.

The Figure 30 shows the structure of a PORT0 pin.

Figure 30.

Block diagram of a Port 0 pin

12.3

Port 1

The two 8-bit ports P1H and P1L represent the higher and lower part of PORT1,

respectively. Both halves of PORT1 can be written (e.g. via a PEC transfer) without effecting

the other half.

If this port is used for general purpose I/O, the direction of each line can be configured via

the corresponding direction registers DP1H and DP1L.

P1L

Address:

0xFF04h / 82h SFR

Reset:

0x--00h

Type:

R/W

P1L.7

P1L.6

P1L.5

P1L.4

P1L.3

P1L.2

P1L.1

P1L.0

R/W

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