TAS5721 datasheet(38/71 Pages) TI1

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TAS5721

SLOS739 – JULY 2012

www.ti.com

OSCILLATOR TRIM REGISTER (0x1B)

The TAS5721 PWM processor contains an internal oscillator to support autodetect of I2S clock rates. This

reduces system cost because an external reference is not required. TI recommends a reference resistor value of

that shown in the Typical Application Circuit Diagrams. The circuit that uses this resistor should be calibrated or

trimmed after each time the device is reset.

Writing 0x00 to register 0x1B enables the trim that was programmed at the factory. It is important to note that

after writing the value 0x00 to the trim register, the register will repor the value 0xC0, to indicate the trim process

is complete.

Table 14. Oscillator Trim Register (0x1B)

FUNCTION

–

Reserved (1)

–

Oscillator trim not done (read-only) (1)

–

Oscillator trim done (read only)

–

Reserved (1)

–

Select factory trim (Write a 0 to select factory trim; default is 1.)

–

Factory trim disabled (1)

–

Reserved (1)

(1)

Default values are in bold.

BKND_ERR REGISTER (0x1C)

When a backend error signal is received from the internal power stage, the power stage is reset stopping all

PWM activity. Subsequently, the modulator waits approximately for the time listed in Table 15 before attempting

to restart the power stage.

Table 15. BKND_ERR Register (0x1C)(1)

FUNCTION

Reserved

–

Set back-end reset period to 299 ms (2)

–

Set back-end reset period to 449 ms

–

Set back-end reset period to 598 ms

–

Set back-end reset period to 748 ms

–

Set back-end reset period to 898 ms

–

Set back-end reset period to 1047 ms

–

Set back-end reset period to 1197 ms

–

Set back-end reset period to 1346 ms

–

Set back-end reset period to 1496 ms

–

(1)

This register can be written only with a non-reserved value. Also this register can be only be written once after the device is reset. If a

different value is desired, the device must be reset before changing 0x1C again.

(2)

Default values are in bold.

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