PC33814AE datasheet(15/50 Pages) FREESCALE

15 / 50 page

Analog Integrated Circuit Device Data



Freescale Semiconductor

33814

4.3

Dynamic Electrical Characteristics

Table 5. Dynamic Electrical Characteristics (12)

Characteristics noted under conditions of 6.0 V

 VPWR  18 V, -40 C  TC  125 C, and Calibrated Timers, unless otherwise

noted. Where applicable, typical values reflect the parameter’s approximate average value with VPWR = 14 V, TA = 25 C.

Characteristic

Symbol

Min

Typ

Max

Unit

POWER INPUT

Required Low State Duration on VCC for Power On Reset

•VCC  0.2 V

tRESET

1.0

–

s

Power on RESET pulse width

t(POR)

100

s

WATCHDOG TIMER

Maximum Time Value Watchdog can be loaded with (default time)

WDMAX

–

sec.

Minimum Time Value Watchdog can be loaded with

WDMIN

1.0

–

Reset Pulse Width when Watchdog times out

WDRESET

100

–

s

VRS CONDITIONING INPUT

Output Blanking Time Programming Range



(% of previous out pulse 0 to 15/32 in 1/32 steps, 15/32 = 46.9%)

OUTPUTBLANK

–

Output Deglitch Filter Time (1/128 of the previous output pulse)

OUTPUTDEGLITCH

–

1.0

–

Delay from CSB to Change in VRS Comparator Threshold (11)

DELAYTHRESH

–

s

Delay from CSB to Change in VRS Output Blank Time (11)

DELAYOBT

–

s

ISO9141 TRANSCEIVER

Typical ISO9141 Data Rate

ISOBR

–

kbps

Turn OFF Delay MTX Input to ISO Output

tTXDF

–

2.0

s

Turn ON/OFF Delay ISO Input to MRX Output

tRXDF, tRXDR

–

1.0

s

Rise and Fall Time MRX Output (measured from 10% to 90%)

tRXR, tRXF

–

1.0

s

Maximum Rise and Fall Time MTX Input (measured from 10% to 90%)

tTXR, tTXF

–

1.0

s

ALL LOW SIDE DRIVERS

Output ON Current Limit Fault Filter Timer

tSC1

µs

Output Retry Timer

tREF

7.0

Inrush Current Delay Timer

tINRUSH

7.0(11)

10(11)

13(11)

Output OFF Open-circuit Fault Filter Timer

t(OFF)OC

100

–

400

µs

Output Slew Rate, INJOUT1,INJOUT2,ROUT1,ROUT2, and LAMPOUT

•RLOAD = 500 VLOAD = 14 V

tSR(RISE)

1.0

5.0

s

Output Slew Rate, INJOUT1,INJOUT2,ROUT1,ROUT2, and LAMPOUT

•RLOAD = 500 VLOAD = 14 V

tSR(FALL)

1.0

5.0

s

Propagation Delay (Input Rising Edge OR CSB to Output Falling Edge)

• Input at 50% VDD to Output voltage 90% of VLOAD (INJ1, INJ2,

ROUT1, ROUT2, LAMP)

tPHL

–

1.0

5.0

µs

Propagation Delay (Input Rising Edge OR CSB to Output Falling Edge)

• Input at 50% VDD to Output voltage 90% of VLOAD (TACHOMETER)

tPHL

–

1.0

6.0

µs

Notes

11.

Guaranteed by Design

12.

PWM frequencies, watchdog time periods, and tachometer driver oscillator mode timings and frequencies, are all derived from the

trimmed, internal oscillator of 4.0 MHz



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