Analog Integrated Circuit Device Data



Freescale Semiconductor

36

33814

In the main loop of the MCU’s program there will be a call to a routine to write the following byte into the watchdog SPI Control

Register to refresh the watchdog periodically (must be < 200 ms).

5.3.7

Low Side Drivers (LSD)

The six open drain low side drivers (LSDs) are designed to control various automotive loads such as injectors, fuel pumps,

solenoids, lamps, and relays, etc. Each driver includes off-state open load detection, on-state short to ground detection, short-

circuit to battery protection, over-current protection, over-temperature protection, and diagnostic fault reporting via the SPI. The

LSDs are individually controlled through the parallel input pins or/and via the SPI. All outputs except ROUT2 are disabled when

the KEYSW input pin is brought low regardless of the state of the input pins. All outputs, including ROUT2 are disabled when the

RESETB pin is low.

5.3.7.1

LSD Input Logic Control

The LSDs (and the pre-drivers) are controlled individually using a combination of the external pin input (if one exists) and/or a

SPI On/Off Control bit. The logic can be made to turn the outputs on or off by means of a logical combination of the external pin

ORed with the SPI Control On/Off Bit or a logical combination of the external pin ANDed with the SPI Control On/Off Bit. A

separate OR/AND select bit is found in the SPI configuration registers to accomplish this selection.

5.3.7.2

Pulse Width Modulation Mode

Besides just turning the outputs ON or OFF, the outputs can be Pulse Width Modulated (PWM’d) to control the outputs with a

variable 0 to 100% duty cycle at a selection of different frequencies. There are two built-in PWM frequencies (100 HZ and

1.0 kHz) and the external input pin can also be used as either an external PWM frequency input (divided by 100) or a total PWM

(frequency and duty cycle) input. Two bits (Bits 1, 0) in the SPI configuration register control which mode of input control is

selected.

The internal PWM duty cycles (D/C) are controlled by the lower 7 bits in the corresponding SPI control register. The duty cycle

for the internal PWM is in 1% increments and is specified in the SPI control register as a 7 bit binary word which provides 128

different binary combinations. The binary values of 0000000 to 1100100 represent 0% to 100% and the binary values 1100100

to 1111111 (100 to 127) all map to 100%.

The external PWM duty cycles (D/C) are provided by the MCU on the input pin of the corresponding output driver.

5.3.7.3

LSD Output Protection

Output protection consists of a dual strategy which utilizes over-current and/or over-temperature sensing to detect a fault and

then automatically control the output to protect the output device from damage.

Table 17.

WD

Refresh

x1 sec.

x100 ms.

x10 ms.

8

4

2

1

1

0

0

0

0

0

0

0

Table 18.

Bits 1, 0

PWM Frequency

PWM D/C

00

None or on ext. pin

None or on ext. pin

01

100 Hz

Internal

10

1.0 kHz

Internal

11

On ext pin



Internal