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TMP320LC2401AVFS bảng dữ liệu(PDF) 66 Page - Texas Instruments

tên linh kiện TMP320LC2401AVFS
Giải thích chi tiết về linh kiện  DSP CONTROLLERS
PDF  88 Pages
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TMP320LC2401AVFS bảng dữ liệu(HTML) 66 Page - Texas Instruments

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TMS320LF2401A, TMS320LC2401A
DSP CONTROLLERS
SPRS161K − MARCH 2001 − REVISED JULY 2007
66
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
RS timing (continued)
XTAL1†
CLKOUT§
RS
tw(RSL2)
tp
td(EX)
CLKIN
TDI‡
I/Os
TDI/OPB5
Code-Dependent
BOOT_EN
Hi-Z
† XTAL1 refers to internal oscillator clock if on-chip oscillator is used.
‡ The TDI pin is used to determine whether or not the on-chip boot ROM is invoked in the BOOT_EN phase. In the “TDI/OPB5” phase, this pin
functions as TDI (if TRST is high) or OPB5 (if TRST is low).
§ Unlike other 24x/240x devices, the CLKOUT signal does not appear on the CLKOUT pin by default (after a device reset). The CLKOUT waveform
depicted in the figure is present internally in the DSP. However, in order to route the internal CLKOUT signal to the
XINT2/ADCSOC/CAP1/IOPA7/CLKOUT pin, bit 7 of the MCRA register must be programmed appropriately.
NOTE A: During warm resets, if the watchdog module is enabled and issues a reset, then the RS pin will be an output and driven low for the WD
pulse duration − 128 CLKIN cycles.
Figure 28. Warm Reset



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