MPC8358E datasheet(57/95 Pages) FREESCALE

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MPC8358E PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 3

Freescale Semiconductor

TDM/SI

Figure 41 and Figure 42 represent the AC timing from Table 55. Note that although the specifications

generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge

is the active edge.

Figure 41 shows the SPI timing in slave mode (external clock).

Figure 41. SPI AC Timing in Slave Mode (External Clock) Diagram

Figure 42 shows the SPI timing in Master mode (internal clock).

Figure 42. SPI AC Timing in Master Mode (Internal Clock) Diagram

17 TDM/SI

This section describes the DC and AC electrical specifications for the time-division-multiplexed and serial

interface of the MPC8358E.

17.1

TDM/SI DC Electrical Characteristics

Table 56 provides the DC electrical characteristics for the device TDM/SI.

Table 56. TDM/SI DC Electrical Characteristics

Characteristic

Symbol

Condition

Min

Max

Unit

Output high voltage

VOH

IOH = –2.0 mA

2.4

—

Output low voltage

VOL

IOL = 3.2 mA

—

0.5

Input high voltage

VIH

—2.0

OVDD + 0.3

SPICLK (Input)

tNEIXKH

tNEIVKH

tNEKHOV

Input Signals:

SPIMOSI

(See Note)

Output Signals:

SPIMISO

(See Note)

Note: The clock edge is selectable on SPI.

SPICLK (Output)

tNIIXKH

tNIKHOV

Input Signals:

SPIMISO

(See Note)

Output Signals:

SPIMOSI

(See Note)

Note: The clock edge is selectable on SPI.

tNIIVKH

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