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MAC7200 bảng dữ liệu(PDF) 139 Page - Freescale Semiconductor, Inc |
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MAC7200 bảng dữ liệu(HTML) 139 Page - Freescale Semiconductor, Inc |
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139 / 976 page  Clock Generation MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 61 generated clock (in Self Clock Mode only). This allows these functions to continue to run during low power operating modes if required. Refer to Chapter 26, “Periodic Interrupt Timer (PIT_RTI)” and Chapter 13, “Miscellaneous Control Module (MCM)” for more information on these modules. In order to ensure the presence of the clock, the MCU includes an on-chip hardware Crystal Monitor connected to the output of the Oscillator, OSCCLK. The Crystal Monitor can be configured to invoke the PLL self clocking mode or to generate a System Reset to time out as a result of no OSCCLK being present. In addition to the Crystal Monitor, the MCU also provides a Clock Quality checker which performs a more accurate check of the clock. The Clock Quality Checker counts a predetermined number of clock edges within a defined time window to ensure that the clock is running. The checker can be invoked following specific events such as wake-up or a Crystal Monitor failure. 5.2 Clock Generation Figure 5-2 and Figure 5-3 shows the clock outputs and gating in the CRG. The effect of the different Low Power modes on the various clocks is discussed in Chapter 3, “Low Power Modes”. |
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