MAC7200 datasheet(137/976 Pages) FREESCALE

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MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

Chapter 5

System Clock Description

5.1

Clocks Introduction

The Clock and Reset Generator (CRG) provides the internal clock signals for the core and all peripheral

modules. Figure 5-1 shows the clock connections from the CRG to all modules. There are six clocks

available on the MAC72xx:

NOTE

It is possible to configure the PLL to generate a System Clock frequency

higher than that supported by the design of the device. It is the responsibility

of the user to ensure that the device is operated within its specified limits at

all times.

Please refer to Chapter 23, “Clock and Reset Generator (CRG)” for details on clock generation.

Table 5-1. Clocks Summary

PLLCLK

This is the clock output of the on-chip PLL. When the PLL is enabled, the System Clock is

driven directly by this clock. When the system is in Self Clock Mode (SCM), this clock drives

the Real Time Interrupt (RTI) and Software Watchdog Timer (SWT).

System Clock

This clock is used throughout the MCU to drive the core, the memories and select

peripherals. It may be driven either by the PLLCLK (when the PLL is enabled) or by the

OSCCLK (when the PLL is bypassed). For a list of which modules are driven by this clock,

please see Table 5-3.

Peripheral Bus Clock

This clock is used throughout the MCU to drive the remainder of the peripherals that are

not driven by the System Clock. It is always running at 1/2 the frequency of the System

Clock. For a list of which modules are driven by this clock, please see Table 5-3.

Oscillator Clock

This clock is driven directly from the output of the on-chip oscillator. Programming the

CTRL register inside the FlexCAN will allow the FlexCAN to use either the Oscillator Clock

or Peripheral Bus Clock.

RTI Clock

This clock is driven by OSCCLK in normal operation, and by PLLCLK when the system is

in Self Clock Mode. It is used to clock the on-chip Real Time Interrupt (RTI) inside the PIT

module.

SWT Clock

This clock is driven by OSCCLK in normal operation, and by PLLCLK when the system is

in Self Clock Mode. It is used to clock the on-chip Software Watchdog Timer (SWT) inside

the MCM module.

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