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MAC7200 bảng dữ liệu(PDF) 300 Page - Freescale Semiconductor, Inc

tên linh kiện MAC7200
Giải thích chi tiết về linh kiện  MAC7200 Microcontroller Family Reference Manual
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
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The SPP DMA Controller Module (SPP_DMA2)
MAC7200 Microcontroller Family Reference Manual, Rev. 2
222
Freescale Semiconductor
12.2.4.1.15
DMA Channel n Priority (DCHPRIn), n = 0,..., {15,31,63}
When the fixed-priority channel arbitration mode is enabled (DMACR[ERCA] = 0), the contents of these
registers define the unique priorities associated with each channel. The channel priorities are evaluated by
numeric value, i.e., 0 is the lowest priority, 1 is the next higher priority, then 2, 3, etc. Software must
program the channel priorities with unique values, otherwise a configuration error will be reported. The
Register address: DMA_Offset + 0x0028 (DMAERRH), +0x002c (DMAERRL)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
0000000000000000
W
Reset
0000000000000000
15
14
13
12
11
10
9876543210
R
0000000000000000
W
Reset
0000000000000000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
0000000000000000
W
Reset
0000000000000000
15
14
13
12
11
10
9876543210
R
W
Reset
0000000000000000
= Unimplemented
Figure 12-15. DMA Error (DMAERRH, DMAERRL) Registers
Table 12-18. DMAERRH, DMAERRL Field Descriptions
Field
Description
31–16
DMA Error n.
0 An error in channel n has not occurred.
1 An error in channel n has occurred.
15–0
ERRn,
n = 0,... 15
DMA Error n.
0 An error in channel n has not occurred.
1 An error in channel n has occurred.



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