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Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

166

Freescale Semiconductor

2. The second pass through the DR then shifts the data in or out of the JTAG port, LSB first.

a) During a read access, data is latched from the selected Nexus register when the JTAG state

machine (see 11.12, “IEEE 1149.1 State Machine and RD/WR Sequences”) passes through the

“Capture-DR” state.

b) During a write access, data is latched into the selected Nexus register when the JTAG state

machine (see 11.12, “IEEE 1149.1 State Machine and RD/WR Sequences”) passes through the

“Update-DR” state.

11.10.5 Programming Considerations (RESET)

If Nexus3 register configuration is to occur during system reset (as opposed to debug mode), all Nexus3

configuration should be completed between the exit from JTAG Test-Logic-Reset state and system reset

de-assertion, after the JTAG ID Register has been read by the tool.

11.11 Functional Description

11.11.1 Ownership Trace

Ownership trace provides a macroscopic view, such as task flow reconstruction, when debugging software

written in a high level (or object-oriented) language. It offers the highest level of abstraction for tracking

operating system software execution. This is especially useful when the developer is not interested in

debugging at lower levels.

11.11.1.1 Ownership Trace Messaging (OTM)

Ownership trace information is messaged via the auxiliary port using an Ownership Trace Message

(OTM). The User Base Address Register (UBA), which can be accessed via the JTAG port, contains the

address of the Ownership Trace Register (OTR). The OTR is updated by the operating system software to

provide task/process ID information.

An OTM is generated when new information is updated in the OTR register by the ARM7 processor, the

data is latched within Nexus, and is messaged out via the auxiliary port, allowing development tools to

trace ownership flow.

Ownership trace information is messaged out in the following format:

11.11.1.2 OTM Error Messages

An Error Message occurs when a new message cannot be queued due to the message queue being full. The

FIFO will discard incoming messages until it has completely emptied the queue. Once emptied, an Error

(32 bits)

(4 bits)

(6 bits)

Task / Process ID Tag

SRC

TCODE (000010)

Fixed length = 42 bits

Figure 11-24. Ownership Trace Message Format

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