68HC05CT4 datasheet(21/142 Pages) FREESCALE

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General Description

Signal Description

MC68HC05CT4 — Rev. 2.0

General Release Specification

General Description

1.4 Signal Description

The following paragraphs describe the signals.

1.4.1 VDD and VSS

Power is supplied to the microcontroller’s digital circuits using these two

pins. VDD is the positive supply and VSS is ground.

1.4.2 VDD2 and VSS2

Power is supplied to noise-susceptible circuitry such as the phase-

locked loop (PLL), comparators, and oscillators that require “cleaner”

supplies using these two pins. VDD2 is the positive supply and VSS2 is

ground.

1.4.3 Maskable Interrupt Request (IRQ)

This pin has a mask option as specified by the user that provides one of

two different choices of interrupt triggering sensitivity. The options are:

1. Negative edge-sensitive triggering only

2. Both negative edge-sensitive and level-sensitive triggering

The microcontroller unit (MCU) completes the current instruction before

it responds to the interrupt request. When IRQ goes low for at least one

tILIH, a logic 1 is latched internally to signify that an interrupt has been

requested. When the MCU completes its current instruction, the interrupt

latch is tested. If the interrupt latch contains a logic 1 and the interrupt

mask bit (I bit) in the condition code register is clear, the MCU then

begins the interrupt sequence.

If the option is selected to include level-sensitive triggering, the IRQ input

requires an external resistor to VDD for wire-OR operation.

The IRQ pin contains an internal Schmitt trigger as part of its input to

improve noise immunity.

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