68HC05CL48 datasheet(128/145 Pages) MOTOROLA

128 / 145 page

GENERAL RELEASE SPECIFICATION

June 11, 1997

MOTOROLA

ELECTRICAL SPECIFICATIONS

MC68HC05CL48

15-4

REV 2.0

Note: The above IDD measurements include the 32kHz oscillator IDD conﬁgured as in Figure 1-4 (a) except for

case (h) and (i).

15.5

CONTROL TIMING

(VDD = 3.3 VDC ±10%, VSS = 0 VDC, TA = –10°C to +70°C, unless otherwise noted)

Notes:

(1) The minimum period tILIL should not be less than the number of cycle times it takes to execute the interrupt

service routine plus 21 tCYC.

15.6

ESD PROTECTION

All pads are designed to withstand 2kV of ESD.

Data

Retention

(i)

VDD=2.0, RESETB = “0”

No Oscillator

IDD

µA

Start Up

(j)

VDD= 0 to 3V, RESETB = “0”

IDD

3.0

CHARACTERISTIC

Symbol

Min

Max

Unit

Frequency of operation

Crystal option

External clock

fOSC

fIN

32.768

—

32.768

—

kHz

MHz

Internal operating frequency

Crystal option

External clock

fOP

0.016384

—

1.802

—

MHz

Cycle time

tCYC

61035

555

Crystal Oscillator Start-up time. (Refer to Figure 1-4 (a))

“From supply=Vdd to the end of POR cycles.”

tOXOV

—3

Crystal Oscillator Start-up Voltage

tOXOV

2.7

5.0

Volts

Crystal Oscillator Small Signal Voltage Gain

Stop recovery Start-up time (crystal oscillator + POR cycles)

tILCH

—70

PLL lock time (after asserting PON-bit)

tPLL

—10

RESET pulse width

tRL

1.5

IOUT

tCYC

Interrupt pulse width (Edge triggered)

tILIH

119

IIN

Interrupt pulse period

tILIL

See note1

—

tCYC

OSC1 Pulse Width

270

280

Mode

Conditions

Symbol

Max

(HC705CL48)

Max

(HC05CL48)

Unit

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