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68HC05CL48 bảng dữ liệu(PDF) 29 Page - Motorola, Inc |
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68HC05CL48 bảng dữ liệu(HTML) 29 Page - Motorola, Inc |
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29 / 145 page ![]() June 11, 1997 GENERAL RELEASE SPECIFICATION MC68HC05CL48 CPU MOTOROLA REV 2.0 3-1 SECTION 3 CPU The MC68HC05CL48 has an 64k memory map. Therefore it uses all 16 bits of the address bus. The stack has only 64 bytes. Therefore, the stack pointer has been reduced to only 6 bits and will only decrement down to $00C0 and then wrap- around to $00FF. All other instructions and registers behave as described in this chapter. 3.1 REGISTERS The MCU contains five registers which are hard-wired within the CPU and are not part of the memory map. These five registers are shown in Figure 3-1 and are described in the following paragraphs. Figure 3-1. MC68HC05 Programming Model 3.1.1 Accumulator (A) The accumulator is a general purpose 8-bit register as shown in Figure 3-1. The CPU uses the accumulator to hold operands and results of arithmetic calculations A X SP PC CC HALF CARRY INTERRUPT MASK NEGATIVE ZERO CARRY 76 543210 15 14 13 12 11 10 9 8 ACCUMULATOR INDEX REGISTER STACK POINTER CONDITION CODE REGISTER 00000 0 011 0 HI N Z C 1 1 1 PROGRAM COUNTER |
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