56F8014 datasheet(43/124 Pages) FREESCALE

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Introduction

56F8014 Technical Data, Rev. 11

Freescale Semiconductor

Part 5 Interrupt Controller (ITCN)

5.1 Introduction

The Interrupt Controller (ITCN) module is used to arbitrate between various interrupt requests (IRQs), to

signal to the 56800E core when an interrupt of sufficient priority exists, and to what address to jump in

order to service this interrupt.

5.2 Features

The ITCN module design includes these distinctive features:

•

Programmable priority levels for each IRQ

•

Two programmable Fast Interrupts

•

Notification to SIM module to restart clocks out of Wait and Stop modes

•

Ability to drive initial address on the address bus after reset

For further information, see Table 4-2, Interrupt Vector Table Contents.

5.3 Functional Description

The Interrupt Controller contains registers that allow each of the 46 interrupt sources to be set to one of

three priority levels (excluding certain interrupts that are of fixed priority). Next, all of the interrupt

requests of a given level are priority encoded to determine the lowest numerical value of the active

interrupt requests for that level. Within a given priority level, number 0 is the highest priority and number

45 is the lowest.

During wait and stop modes, the system clocks and the 56800E core are turned off. The ITCN can wake

the core and restart system clocks by signaling a pending IRQ to the System Integration Module (SIM) to

FM_USTAT

$13

User Status Register

FM_CMD

$14

Command Register

$15

Reserved

$16

Reserved

$17

Reserved

FM_DATA

$18

Data Buffer Register

$19

Reserved

$1A

Reserved

FM_OPT1

$1B

Optional Data 1 Register

Reserved

FM_TSTSIG

$1D

Test Array Signature Register

Table 4-22 Flash Module Registers Address Map (Continued)

(FM_BASE = $00 F400)

Address Offset

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