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ADT7490ARQZ-R7 bảng dữ liệu(PDF) 59 Page - ON Semiconductor

tên linh kiện ADT7490ARQZ-R7
Giải thích chi tiết về linh kiện  dBCool Remote Thermal Monitor and Fan Controller with PECI Interface
PDF  75 Pages
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nhà sản xuất  ONSEMI [ON Semiconductor]
Trang chủ  http://www.onsemi.com
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ADT7490ARQZ-R7 bảng dữ liệu(HTML) 59 Page - ON Semiconductor

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ADT7490
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59
Table 50. Register 0x62 — Enhanced Acoustics Register 1 (Power−On Default = 0x00)
Bit No.
Mnemonic
R/W (Note 1)
Description
[2:0]
ACOU
(Note 2)
R/W
Assuming that PWMx is associated with the Remote 1 temperature channel, these bits define
the maximum rate of change of the PWMx output for Remote 1 temperature−related changes.
Instead of the fan speed jumping instantaneously to its newly determined speed, it ramps
gracefully at the rate determined by these bits. This feature ultimately enhances the acoustics
of the fan.
When Bit 7 of Configuration Register 6 (0x10) is 0
Bit Code
Time for 0% to 100%
000 = 1
001 = 2
010 = 3
011 = 4
100 = 8
101 = 12
110 = 24
111 = 48
37.5 sec
18.8 sec
12.5 sec
7.5 sec
4.7 sec
3.1 sec
1.6 sec
0.8 sec
When Bit 7 of Configuration Register 6 (0x10) is 1
Bit Code
Time for 0% to 100%
000 = 1
001 = 2
010 = 3
011 = 4
100 = 8
101 = 12
110 = 24
111 = 48
52.2 sec
26.1 sec
17.4 sec
10.4 sec
6.5 sec
4.4 sec
2.2 sec
1.1 sec
[3]
EN1
R/W
When this bit is 1, smoothing is enabled on Remote 1 temperature channel.
[4]
SYNC
R/W
SYNC = 1 synchronizes fan speed measurements on TACH2, TACH3, and TACH4 to PWM3.
This allows up to three fans to be driven from PWM3 output and their speeds to be measured.
SYNC = 0 synchronizes only TACH3 and TACH4 to PWM3 output.
[5]
MIN1
R/W
When the ADT7490 is in automatic fan control mode, this bit defines whether PWM1 is off
(0% duty cycle) or at PWM1 minimum duty cycle when the controlling temperature is below
its TMIN − hysteresis value.
0 = 0% duty cycle below TMIN – hysteresis.
1 = PWM1 minimum duty cycle below TMIN – hysteresis.
[6]
MIN2
R/W
When the ADT7490 is in automatic fan speed control mode, this bit defines whether PWM2 is
off (0% duty cycle) or at PWM2 minimum duty cycle when the controlling temperature is
below its TMIN − hysteresis value.
0 = 0% duty cycle below TMIN – hysteresis.
1 = PWM2 minimum duty cycle below TMIN – hysteresis.
[7]
MIN3
R/W
When the ADT7490 is in automatic fan speed control mode, this bit defines whether PWM3 is
off (0% duty cycle) or at PWM3 minimum duty cycle when the controlling temperature is
below its TMIN – hysteresis value.
0 = 0% duty cycle below TMIN – hysteresis.
1 = PWM3 minimum duty cycle below TMIN – hysteresis.
1. This register becomes read-only when the Configuration Register 1 (0x40) LOCK bit is set to 1. Any further attempts to write to this register
have no effect.
2. Setting the relevant bit of Configuration Register 6 (0x10, Bits [2:0]) further decreases these ramp rates by a factor of 4.



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