IP4778CZ38SLASHV datasheet(7/26 Pages) NXP

7 / 26 page

IP4778CZ38_2

Product data sheet

Rev. 02 — 12 February 2009

7 of 26

NXP Semiconductors

IP4778CZ38

HDMI ESD protection, DDC buffering and hot plug control

Static characteristics

[1]

This measurement is performed with a 0.1

µF external capacitor on pin TMDS_BIAS.

[2]

This parameter is guaranteed by design.

Table 4.

TMDS protection circuit

Tamb =25 °C; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Zener diode

VBRzd

Zener diode breakdown

voltage

I = 1 mA

Rdyn

dynamic resistance

I = 1 A; IEC 61000-4-5/9

positive transient

2.4

Ω

negative transient

1.3

Ω

Protection diode

Ibck

back current

from pins TMDS_x to pin TMDS_BIAS;

VCC(5V0) =0V; VCC(3V3) =0V

0.1

µA

IL(r)

reverse leakage current

VI = 3.0 V

µA

forward voltage

0.7

VCL(ch)trt(pos)

positive transient channel

clamping voltage

VESD = 8 kV per IEC 61000-4-2; voltage

30 ns after trigger

[1] -8

-V

TMDS channel: pins TMDS_x

Cch(TMDS)

TMDS channel capacitance

VCC(5V0) = 5 V; f = 1 MHz; Vbias = 2.5 V

[2] -

0.7

∆Cch(TMDS)

TMDS channel capacitance

difference

VCC(5V0) = 5 V; f = 1 MHz; Vbias = 2.5 V

[2] -

0.05

Cch(mutual)

mutual channel capacitance

between signal pin TMDS_x and pin

n.c.; VCC(5V0) = 0 V; f = 1 MHz;

Vbias = 2.5 V

[2] -

0.07

Table 5.

DDC circuit

VCC(3V3) = 2.7 V to 5.5 V; VCC(5V0) = 4.5 V to 5.5 V; GND = 0 V; Tamb =25 °C; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ Max

Unit

Supplies: pins VCC(5V0) and VCC(3V3)

VCC(5V0)

supply voltage (5.0 V)

4.5

5.0

5.5

VCC(3V3)

supply voltage (3.3 V)

2.7

3.3

5.5

ICC(5V0)

supply current (5.0 V)

VCC(5V0) = 5.5 V; both

channels HIGH:

DDC_DAT_OUT = VCC(5V0);

DDC_CLK_OUT = VCC(5V0)

0.5

1.0

VCC(5V0) = 5.5 V; both

channels LOW:

DDC_DAT_IN = GND;

DDC_CLK_IN = GND;

DDC_DAT_OUT = open;

DDC_CLK_OUT = open

0.5

1.0

ICC(3V3)

supply current (3.3 V)

no pull-up resistor

connected to VCC(3V3)

0.1

µA

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