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IP4778CZ38/V bảng dữ liệu(PDF) 18 Page - NXP Semiconductors |
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IP4778CZ38/V bảng dữ liệu(HTML) 18 Page - NXP Semiconductors |
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18 / 26 page ![]() IP4778CZ38_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 12 February 2009 18 of 26 NXP Semiconductors IP4778CZ38 HDMI ESD protection, DDC buffering and hot plug control 10.8 Typical application This application ensures that the EDID (stored in the EEPROM) can be read out in Standby mode, even if long cables are used, to guarantee correct CEC wake-up handling. To wake up the system from Standby to normal operation, the HDMI source has to first read the EDID in order to hand over the port ID via the CEC protocol. This ensures that the HDMI starts up and switches to the correct HDMI port to display the HDMI source which initiated the CEC wake-up sequence. The CEC-bus is enabled by activating the VCC(3V3) standby supply. The RF routing optimized pin position variant allows optimum design layout of the RF routing micro strips to ensure that the impedance of the TMDS lines remain within the specification limits. Part of the microstrips comprise a solid ground plane which is located beneath the device. Fig 15. Application showing optimized PCB microstrip lines 8765 1234 EDID 001aag049 IP4778CZ38 HDMI connector 1 2 3 4 5 6 7 8 9 10 TMDS_D2+ TMDS_D2 − TMDS_D1+ TMDS_D1 − TMDS_D0+ TMDS_D0 − TMDS_CLK+ TMDS_CLK − CEC_IN DDC_CLK_IN DDC_DAT_IN HOT_PLUG_DET_IN 11 12 13 14 15 16 17 18 +3.3 V 19 19 1 Rdata 1.5 k Ω Rclock 1.5 k Ω RCEC 100 k Ω RCEC 27 k Ω Rdata 47 k Ω Rclock 47 k Ω 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 ENABLE VCC(5V0) VCC(3V3) stand by TMDS_D2+ TMDS_GND TMDS_D2 − TMDS_D1+ TMDS_GND TMDS_D1 − TMDS_D0+ TMDS_GND TMDS_D0 − TMDS_CLK+ TMDS_GND TMDS_CLK − CEC n.c. DDC_CLK DDC_DAT GND +5 V HOTPLUG_DET RDDC 100 Ω RHP 1 k Ω +5.0 V |
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