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IP4778CZ38/V bảng dữ liệu(PDF) 6 Page - NXP Semiconductors |
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IP4778CZ38/V bảng dữ liệu(HTML) 6 Page - NXP Semiconductors |
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6 / 26 page ![]() IP4778CZ38_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 12 February 2009 6 of 26 NXP Semiconductors IP4778CZ38 HDMI ESD protection, DDC buffering and hot plug control [1] Pins GND and TMDS_GND are internally connected. [2] This pin must always be connected to the IC pin located opposite via a PCB track to guarantee correct functionality; see Figure 15. [3] VCC(3V3) referenced logic level in. [4] VCC(5V0) referenced logic level out. 7. Limiting values [1] Connector side pins: TMDS_D2+, TMDS_D2 −, TMDS_D1+, TMDS_D1−, TMDS_D0+, TMDS_D0−, TMDS_CLK+, TMDS_CLK −, CEC_OUT, DDC_DAT_OUT and DDC_CLK_OUT, HOT_PLUG_DET_OUT. [2] Board side pins: CEC_IN, DDC_DAT_IN and DDC_CLK_IN, HOT_PLUG_DET_IN, ENABLE. n.c. 32 32 not connected[2] TMDS_D2 − 34 33 ESD protection TMDS channel D2 −[2] TMDS_GND 33 34 ground for TMDS channel[1] n.c. 35 35 not connected[2] GND 36 36 ground for DDC, Hot Plug and CEC circuits[1] VCC(3V3) 37 37 supply voltage for CEC circuit TMDS_BIAS 38 38 bias input for TMDS ESD protection. This pin must be connected to a 0.1 µF capacitor. Table 2. Pin description …continued Symbol Pin Description IP4778CZ38 IP4778CZ38/V Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCC supply voltage GND − 0.5 5.5 V VI input voltage at input pins GND − 0.5 5.5 V VESD electrostatic discharge voltage connector side pins (to ground); IEC 61000-4-2, level 4 [1] contact −8+8 kV board side pins; IEC 61000-4-2, level 1 [2] contact −2+2 kV Ptot total power dissipation DDC operating at 100 kHz - 8 mW Tstg storage temperature −55 +125 °C |
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