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IMX35 bảng dữ liệu(PDF) 46 Page - Freescale Semiconductor, Inc

tên linh kiện IMX35
Giải thích chi tiết về linh kiện  i.MX35 Applications Processors for Industrial and Consumer Products
PDF  148 Pages
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nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
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IMX35 bảng dữ liệu(HTML) 46 Page - Freescale Semiconductor, Inc

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i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6
Freescale Semiconductor
46
NOTE
SDR SDRAM CLK parameters are measured from the 50% point—that is,
high is defined as 50% of signal value and low is defined as 50% of signal
value. SD1 + SD2 does not exceed 7.5 ns for 133 MHz.
The timing parameters are similar to the ones used in SDRAM data
sheets—that is, Table 32 indicates SDRAM requirements. All output signals
are driven by the ESDCTL at the negative edge of SDCLK and the
parameters are measured at maximum memory frequency.
SD7
Address hold time
tAH
1.8
—
ns
SD8
SDRAM access time
tAC
—
6.47
ns
SD9
Data out hold time1
tOH
1.2
—
ns
SD10
Active to read/write command period
tRC
10
—
clock
1 Timing parameters are relevant only to SDR SDRAM. For the specific DDR SDRAM data related timing parameters, see
Table 40 and Table 41.
Table 32. DDR/SDR SDRAM Read Cycle Timing Parameters (continued)
ID
Parameter
Symbol
Min.
Max.
Unit



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