IMX35 datasheet(37/148 Pages) FREESCALE

37 / 148 page

i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6

Freescale Semiconductor

NOTE

Test conditions: load capacitance, 25 pF. Recommended drive strength for

all controls, address, and BCLK is set to maximum drive.

Recommended drive strength for all controls, address and BCLK is set to

maximum drive.

Table 30. WEIM Bus Timing Parameters1

1 “High” is defined as 80% of signal value, and “low” is defined as 20% of signal value.

Parameter

Min.

Max.

Unit

WE1

BCLK cycle time2

2 BCLK parameters are measured from the 50% point. For example, “high” is defined as 50% of signal value and “low” is defined

as 50% of signal value.

14.5

—

WE2

BCLK low-level width2

7—

WE3

BCLK high-level width2

7—

WE4

Clock fall to address valid

WE5

Clock rise/fall to address invalid

WE6

Clock rise/fall to CSx_B valid

WE7

Clock rise/fall to CSx_B invalid

3.6

WE8

Clock rise/fall to RW_B valid

WE9

Clock rise/fall to RW_B invalid

WE10

Clock rise/fall to OE_B valid

WE11

Clock rise/fall to OE_B invalid

3.8

5.5

WE12

Clock rise/fall to EBy_B valid

11.5

WE13

Clock rise/fall to EBy_B invalid

WE14

Clock rise/fall to LBA_B valid

17.5

WE15

Clock rise/fall to LBA_B invalid

WE16

Clock rise/fall to Output Data valid

WE17

Clock rise to Output Data invalid

2.5

WE18

Input Data Valid to Clock rise3

3 Parameters W18, W20, W22, and W24 are tested when FCE=1. i.MX35 does not support FCE=0.

1—

WE20

Clock rise to Input Data invalid3

1—

WE22

ECB_B setup time3

5—

WE24

ECB_B hold time3

0—

WE26

DTACK_B setup time

5.4

—

WE27

DTACK_B hold time

–3.2

—

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