IMX35 datasheet(4/148 Pages) FREESCALE

4 / 148 page

i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6

Freescale Semiconductor

1.3

Block Diagram

Figure 1 is the i.MX35 simplified interface block diagram.

Figure 1. i.MX35 Simplified Interface Block Diagram

Functional Description and Application Information

The i.MX35 consists of the following major subsystems:

•

ARM1136 Platform—AP domain

•

SDMA Platform and EMI—Shared domain

2.1

Application Processor Domain Overview

The applications processor (AP) and its domain are responsible for running the operating system and

applications software, providing the user interface, and supplying access to integrated and external

peripherals. The AP domain is built around an ARM1136JF-S core with 16-Kbyte instruction and data L1

caches, an MMU, a 128-Kbyte L2 cache, a multiported crossbar switch, and advanced debug and trace

interfaces.

External Memory

Interface (EMI)

Smart

DMA

Peripherals

ARM11

Internal

Memory

DDR2/SDDR

RAM

NOR

Flash/

NAND

Flash

Audio/Power

Management

ARM1136JF-S

ESAI

SPBA

CSPI

UART

Camera

Image

Processing Unit

(IPU)

Platform

Bluetooth

MMC/SDIO

Keypin

VFP

L2 cache

MAX

AIPS (2)

JTAG

LCD Display 2

LCD Display 1

Sensor

External Graphics

Accelerator

Timers

GPT

RTC

GPIO(3)

WDOG

OWIRE

I2C(3)

PWM

KPP

UART(2)

3 FuseBox

PSRAM

or WLAN

SCC

CAN(2)

SPDIF

HS USBOTG

ATA

IIM

CSPI

RTICv3

eSDHC(3)

MSHC

ASRC

AUDMUX

L1 I/D cache

ETM

AVIC

RNGC

EPIT

ECT

IOMUX

FEC

HS USBOTGPHY

HS USBHost

FS USBPHY

SSI

GPIO(3)

ECT

GPU 2D

Connectivity

Access

ARM1136 Platform Peripherals

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