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PCM5310PAPR bảng dữ liệu(PDF) 20 Page - Texas Instruments |
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PCM5310PAPR bảng dữ liệu(HTML) 20 Page - Texas Instruments |
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20 / 103 page ![]() POWER ON/OFF RESET VDD Power-OnReset 2.2V Typical (1.6Vto2.8V) 0s(min) RSTB I CSetting 2 1ms(min) Power-UpforADCsandDACs (1) SCKx InternalResetfor ADCsandDACs ClockInput 1.6V Typical (1.0Vto2.0V) ClockInput ClockInput I CSettingisEffective 2 1024Clocks PCM5310 SLES244 – FEBRUARY 2009 ............................................................................................................................................................................................ www.ti.com The power-on reset (POR) circuit generates a reset signal at typically 2.2 V; this circuit does not depend on the other power supplies: VCCDA, VCCAD, VCCH, and VCCP. The internal circuit is cleared to default status, then all analog and digital outputs have no signal. It is recommended to turn the device on and off as shown in Figure 31, in order to avoid loud, audible pop noises when powering the device on or off. (1) RSTB is active low. 100 ns (minimum) is needed for an effective reset to the internal circuit. Figure 31. Power On/Off Reset 20 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): PCM5310 |
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