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PCM5310PAPR bảng dữ liệu(PDF) 80 Page - Texas Instruments |
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PCM5310PAPR bảng dữ liệu(HTML) 80 Page - Texas Instruments |
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80 / 103 page ![]() Register 105 (69h) PCM5310 SLES244 – FEBRUARY 2009 ............................................................................................................................................................................................ www.ti.com REG HEX DESCRIPTION B7 B6 B5 B4 B3 B2 B1 B0 105 69h DATA selection of PORT-3 and PORT-4 DTS4[3:0] DTS3[3:0] DTS4[3:0]: DATA Selection of PORT-4 (MUX_P4DT) These bits are used for routing DATA of PORT-4. Any combination of DATA1 to DATA6 and DATA of ADCs in master mode can be connected to PORT-4. Refer to Figure 49 for more details. Default value: 0011 0000 Output DATA1 0001 Output DATA2 0010 Output DATA3 0011 Input DATA4 (default) 0100 Output DATA5 0101 Output DATA6 0110 Output GPIO1 0111 Output GPIO2 1000 Output DATA from ADC12 1001 Output DATA from ADC34 Others Reserved DTS3[3:0]: DATA Selection of PORT-3 (MUX_P3DT) These bits are used for routing DATA of PORT-3. Any combination of DATA1 to DATA6 and DATA of ADCs in master mode can be connected to PORT-3. Refer to Figure 50 for more details. Default value: 0010 0000 Output DATA1 0001 Output DATA2 0010 Input DATA3 (default) 0011 Output DATA4 0100 Output DATA5 0101 Output DATA6 0110 Output GPIO1 0111 Output GPIO2 1000 Output DATA from ADC12 1001 Output DATA from ADC34 Others Reserved 80 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): PCM5310 |
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