7906 datasheet(102/531 Pages) RENESAS

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7906 Group User’s Manual Rev.2.0

INTERRUPTS

6-23

Fig. 6.10.7 Program example to reserve time required for change of interrupt priority level

Table 6.10.2 Correspondence between number of instructions to be inserted in Figure 6.10.7 and

interrupt priority detection time select bits

[Precautions for interrupts]

1. In order to change the interrupt priority level select bits (bits 0 to 2 at addresses 6E16 to 7C16, F516 to F916,

FD16 to FF16), 2 to 7 cycles of fsys are required after execution of a write instruction until change of the

interrupt priority level. Therefore, when the interrupt priority level of a certain interrupt source is repeatedly

changed in a very short time, which consists of a few instructions, it is necessary to reserve the time

required for the change by software. Figure 6.10.7 shows a program example to reserve the time required

for the change. Note that the time required for the change depends on the contents of the interrupt priority

detection time select bits (bits 4 and 5 at address 5E16). Table 6.10.2 lists the correspondence between

the number of instructions inserted in Figure 6.10.7 and the interrupt priority detection time select bits.

Interrupt priority detection time select bits (Note)

Interrupt priority level

detection time

7 cycles of fsys

4 cycles of fsys

2 cycles of fsys

Do not select.

Number of inserted

NOP instructions

7 or more

4 or more

2 or more

Note: We recommend [b5 = “1”, b4 = “0”].

2. When allocating pin INT3 to pin P74, be sure that the D-A1 output enable bit (bit 2 at address 9616) =

0 (output disabled).

3. When using pin P6OUTCUT/INT4 as an input pin of an external interrupt (pin INT4), be sure to use port pins

P60 to P65 in the input mode. (Refer to section “5.2.3 Pin P6OUTCUT/INT4.”)

; Write instruction for the interrupt priority level select bits

; Inserted NOP instruction (Note)

;

; Write instruction for the interrupt priority level select bits

Note: Except a write instruction for address XX16, any instruction which has the same

cycles as the NOP instruction can also be inserted, instead of the NOP instruction.

For the number of inserted NOP instructions, see Table 6.10.2.

XX: any of 6E to 7F, F1, F2, F5 to F9, and FD to FF

MOVMB 00XXH, #0XH

NOP

MOVMB 00XXH, #0XH

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