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7733 bảng dữ liệu(PDF) 271 Page - Renesas Technology Corp |
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7733 bảng dữ liệu(HTML) 271 Page - Renesas Technology Corp |
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271 / 940 page ![]() A-D CONVERTER 7733 Group User’s Manual 9–6 b7 b6 b5 b4 b3 b2 b1 b0 A-D control register 1 (address 1F 16) Bit 1 0 Bit name At reset 1 RW Functions 0 0: Pins AN0 and AN1 (2 pins) 0 1: Pins AN0 to AN3 (4 pins) 1 0: Pins AN0 to AN5 (6 pins) (Note 2) 1 1: Pins AN0 to AN7 (8 pins) b1 b0 Not implemented. Undefined 1 These bits are ignored in the one-shot and repeat modes. (They may be “0” or “1.”) When an external trigger is selected, pin AN 5 cannot be used as an analog input pin. Writing to each bit of the A-D control register 1 must be performed while the A-D converter stops operating. When the VREF connection selection bit is cleared from “1” to “0,” wait for an interval of 1 µs or more passed, and then start A-D conversion. 2 3 8/10-bit mode selection bit 0: 8-bit resolution 1: 10-bit resolution A-D sweep pin selection bits (Valid in the single sweep and repeat sweep modes.) (Note 1) 0 4 Must be fixed to “0.” 5 VREF connection selection bit (Note 4) 0: Pin VREF is connected. 1: Pin VREF is disconnected. (High impedance) 7 6 Not implemented. 0 0 Undefined RW RW RW RW RW _ 0 Notes 1: 2: 3: 4: 9.2.2 A-D control register 1 Figure 9.2.3 shows the structure of A-D control register 1. 9.2 Block description Fig. 9.2.3 Structure of A-D control register 1 (1) A-D sweep pin selection bits (bits 1 and 0) These bits are used to select analog input pins in the single sweep and repeat sweep modes. Refer to section “9.2.5 Port P7 direction register.” (2) VREF connection selection bit (bit 5) This bit is used to disconnect the A-D converter’s resistor ladder network from the reference voltage input pin (VREF) when not using the A-D converter. When pin VREF is disconnected from the resistor ladder network, no current flows from pin VREF to the resistor ladder network. _ |
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