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7733 bảng dữ liệu(PDF) 255 Page - Renesas Technology Corp

tên linh kiện 7733
Giải thích chi tiết về linh kiện  16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  940 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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7733 bảng dữ liệu(HTML) 255 Page - Renesas Technology Corp

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SERIAL I/O
7733 Group User’s Manual
8–52
Fig. 8.4.5 How to detect transmit completion
8.4 Clock asynchronous serial I/O (UART) mode
[When not using interrupts]
[When using interrupts]
UARTi transmission interrupt request
occurs when transmission is started.
UARTi transmission interrupt
g This diagram indicates bits and registers
required for processing.
Refer to Figures 8.4.6, 8.4.7 and 8.4.8 for
details about the change of flag status and the
occurrence timing of an interrupt request.
UART0 transmission interrupt control register (address 71 16)
UART1 transmission interrupt control register (address 73 16)
A-D/UART2 trans./rece. interrupt control register (address 70 16)
b7
b0
Interrupt request bit
0: No interrupt has occurred.
1: Interrupt has occurred.
(Transmission has been started.)
Checking the start of transmission
Processing at transmit completion
UART0 transmit/receive control register 0 (address 34 16)
UART1 transmit/receive control register 0 (address 3C 16)
UART2 transmit/receive control register 0 (address 68 16)
b7
b0
Checking the completion of transmission
00
Transmisson register empty flag
0: Transmission is in progress.
1: Transmission is completed.
Note: Nothing is implemented to bits 7 to 4 of UART2.



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