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7733 bảng dữ liệu(PDF) 252 Page - Renesas Technology Corp

tên linh kiện 7733
Giải thích chi tiết về linh kiện  16-BIT SINGLE-CHIP MICROCOMPUTER
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nhà sản xuất  RENESAS [Renesas Technology Corp]
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SERIAL I/O
7733 Group User’s Manual
8–49
8.4 Clock asynchronous serial I/O (UART) mode
8.4.3 Method of transmission
Figure 8.4.3 shows an initial setting example for related registers when transmitting.
The difference derived by selection of transfer data length (7 bits, 8 bits, or 9 bits) is only that data is
transmitted in different lengths. When a 7/8-bit data length is selected, set the transmit data in the low-
order byte of the UARTi transmission buffer register; when a 9-bit data length is selected, set the transmit
data in the low-order byte and bit 0 of the high-order byte.
Transmission is started when the following conditions (Œ to Ž) are satisfied:
Œ Transmit enable state (transmit enable bit = “1”)
 Transmit data is present in the UARTi transmission buffer register (transmission buffer empty flag = “0”)
____
____
Ž The CTSi pin’s input is at “L” level (when the CTS function is selected)
____
Note: When the CTS function is not selected or in UART2, this condition is ignored.
____
____
By connecting the RTSi pin (receiver side) and CTSi pin (transmitter side), the timing of transmission and
that of reception can be matched (UART0, UART1). For details, refer to section “8.4.6 Receive operation.”
When using interrupts, settings for enabling interrupts are required. For details, refer to chapter “4. Interrupts.”
Figure 8.4.4 shows how to write data after transmission is started and Figure 8.4.5 shows how to detect
the transmit completion.



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