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SERIAL I/O

7733 Group User’s Manual

8–44

8.4 Clock asynchronous serial I/O (UART) mode

Table 8.4.1 lists the performance overview in the UART mode and Table 8.4.2 lists the functions of I/O pins

in this mode.

Table 8.4.1 Performance overview in UART mode

Functions

1 bit

7 bits, 8 bits, or 9 bits

0 bit or 1 bit (Odd or Even can be selected.)

1 bit or 2 bits

BRGi’s output divided by 16 (Maximum of 781.25 kbps

(Note))

Maximum of 312.5 kbps

4 types (Overrun, Framing, Parity, and Summing)

Presence of error can be detected only by checking error sum flag.

Item

Start bit

Character bit (Transfer data)

Parity bit

Stop bit

When internal clock is selected

When external clock is selected

Transfer

data format

Transfer rate

Error detection

Note: This is applied when the system clock selection bit (bit 3 at address 6C16) = “0” and the system clock

frequency = 25 MHz (f(f2) = 12.5 MHz). (For details, refer to chapter “14. CLOCK GENERATING

CIRCUIT.”

Table 8.4.2 Functions of I/O pins in UART mode

Pin name

TxDi

(P83, P87, P75)

RxDi

(P82, P86, P74)

CLKi

(P81, P85, P73)

____ ____

CTSi

/RTSi (Note)

(P80, P84)

CTS2

(P72)

Functions

Serial data output

Serial data input

Programmable I/O port

BRGi count source input

____

CTS

input

____

RTS

output

Programmable I/O port

____

CTS

input

Programmable I/O port

Method of selection

(They cannot be used as programmable I/O ports.)

Ports P7 and P8 direction register’s corresponding bit = “0”

(They can be used as input ports when only transmission is performed.)

Internal/External clock selection bit = “0”

Internal/External clock selection bit = “1”

____ ____

CTS

/RTS enable bit = “0”

____ ____

CTS

/RTS function selection bit = “0”

____ ____

CTS

/RTS enable bit = “0”

____ ____

CTS

/RTS function selection bit = “1”

____ ____

CTS

/RTS enable bit = “1”

____

CTS

enable bit = “0”

____

CTS

enable bit = “1”

Port P7 direction register: Address 1116

Port P8 direction register: Address 1416

Internal/External clock selection bit: Bit 3 at addresses 3016, 3816, and 6416

____ ____

CTS

/RTS enable bit: Bit 4 at addresses 3416 and 3C16

____ ____

CTS

/RTS function selection bit: Bit 2 at addresses 3416 and 3C16

____

CTS

enable bit: Bit 2 at addresses 6816

g The TxDi pin outputs “H” level while not transmitting after a UARTi’s operating mode is selected.

(The TxDi pin is in a floating state when N-channel open-drain output is selected.)

____

Note: The RTSi output function is not assigned for UART2.

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