7733 datasheet(206/940 Pages) RENESAS

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SERIAL I/O

7733 Group User’s Manual

8–3

Table 8.1.1 Differences between UART0, UART1 and UART2

Communication

Clock synchronous or

asynchronous (UART)

mode is selectable.

Clock synchronous or

asynchronous (UART)

mode is selectable.

Clock synchronous or

asynchronous (UART)

mode is selectable.

UART0

UART1

UART2

Notes 1: The A-D conversion interrupt and UART2 transmission/reception interrupt share the interrupt

vector addresses and the interrupt control register.

When the UART2 mode is selected by specifying bits 2 to 0 of the UART2 transmit/receive mode

2: UART2 is fixed as follows.

• Data output (TxD2 pin): CMOS output

• Polarity of CLK2: Transmit data is output at the falling edge of the transfer clock.

Receive data is input at the rising edge of the transfer clock.

When not transferring, CLK2 pin’s level is “H.”

(Used in the clock synchronous serial I/O mode)

• Transfer format: LSB (the least significant bit) first

8.1 Overview

Multiple

clocks output

function

Available

Not available

Sleep

function

Available

Not

available

_______

CTS

input/

_______

RTS

output

function

Both functions are

available.

Both functions are

available.

_______

Only CTS input

function is available.

Interrupt

function

•UART0 transmission

•UART0 reception

(2 systems)

•UART1 transmission

•UART1 reception

(2 systems)

•UART2 transmission

/reception (Note 1)

(1 system)

Data output/CLK

polarity/transfer format

select function

Available

Not available

(Note 2)

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