7733 datasheet(564/940 Pages) RENESAS

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APPENDIX

7733 Group User’s Manual

21-16

Appendix 3. Control registers

UARTi transmit/receive control register 1

At reset

Bit

Bit name

Framing error flag (Notes 1 and 2)

(Valid in the UART mode.)

0: No framing error is detected.

1: Framing error is detected.

Functions

UART0 transmit/receive control register 1 (address 3516)

UART1 transmit/receive control register 1 (address 3D16)

UART2 transmit/receive control register 1 (address 6916)

Notes 1: Bits 4 to 7 are cleared to “0” when the serial I/O mode selection bits (bits 2 to 0 at

addresses 3016, 3816) are cleared to “0002” or when the receive enable bit is cleared

to “0.” (Bit 7 is cleared to “0” when all of bits 4 to 6 are “0.”)

Note also that bits 5 and 6 are cleared to “0” when the low-order byte of the UARTi

receive buffer register (addresses 3616, 3E16, 6A16) is read out.

2: Bits 5 to 7 are ignored in the clock synchronous serial I/O mode.

Transmit enable bit

0: Transmission is disabled.

1: Transmission is enabled.

Transmission buffer empty flag

0: Data is present in the transmission

buffer register.

1: No data is present in the

transmission buffer register.

Receive enable bit

0: Reception is disabled.

1: Reception is enabled.

Receive completion flag

0: No data is present in the receive

buffer register.

1: Data is present in the receive

buffer register.

Overrun error flag (Note 1)

0: No overrun error is detected.

1: Overrun error is detected.

Parity error flag (Notes 1 and 2)

(Valid in the UART mode.)

0: No parity error is detected.

1: Parity error is detected.

Error sum flag (Notes 1 and 2)

(Valid in the UART mode.)

0: No error is detected.

1: Error is detected.

UARTi receive buffer register

(b15)

(b8)

UART0 receive buffer register (addresses 3716, 3616)

UART1 receive buffer register (addresses 3F16, 3E16)

UART2 receive buffer register (addresses 6B16, 6A16)

Bit

Not implemented.

A value of “0” is read out from here.

The receive data is read out from here.

At reset

Un-

defined

Functions

8 to 0

15 to 9

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