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7733 bảng dữ liệu(PDF) 540 Page - Renesas Technology Corp

tên linh kiện 7733
Giải thích chi tiết về linh kiện  16-BIT SINGLE-CHIP MICROCOMPUTER
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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EXTERNAL ROM VERSION
7733 Group User’s Manual
20–24
20.7 Timer A
(5) Selectable functions
The pulse width modulation function and the RTP0 output level reverse function are described below.
q Pulse width modulation function
The RTP0 operation when the positive polarity is selected is described below.
Note: Description in ( ) is applied to the RTP1 operation.
When “the pulse width modulation selection bit by timer A1(A3)” [bit 4(5)) at address 6216] is set
to “1,” “modulated” (Refer to Figure 20.7.5.) is selected. The pulse width modulation is performed
while pins RTP00 to RTP03 (RTP10 to RTP13) output “H” level. (Refer to section “6.6 Pulse width
modulation (PWM) mode” and Figure 20.7.4.) Figure 20.7.11 shows an operation example when
“modulated” is selected.
Fig. 20.7.11 Operation example when “modulated” is selected
n
000016
3 (00112)
6 (01102)
C (11002)
9 (10012)
FFFF16
Timer A0 interrupt request bit
n, m : Reloaded value
m
RTP03 output
RTP02 output
RTP01 output
RTP00 output
Timer A1 interrupt request bit
Count start flag
Counting is started.
Contents of
pulse output data register 0
Cleared to “0” when an interrupt request is accepted;
otherwise, cleared by software.
Cleared to “0” when an interrupt request is accepted;
otherwise, cleared by software.
Pulse output is started.
Note: The output level of the pulse output port is undefined from when the pulse output port mode is set until
the first timer underflow occurs. Also, this output level is at a floating state after reset because the
pulse output port becomes the input port at that time.
In the above example, in order to shorten this undefined period, the following procedure is performed:
• A small value (n) is set to the timer counter as the initial value.
• After the first underflow occurs, the normal value (m) is set to the timer counter.



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