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SH7721 bảng dữ liệu(PDF) 199 Page - Renesas Technology Corp

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Giải thích chi tiết về linh kiện  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
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Section 3 DSP Operating Unit
Rev. 3.00 Jan. 18, 2008 Page 137 of 1458
REJ09B0033-0300
3.5.8
Shift Operations
Shift operations can use either register or immediate value as the shift amount operand. Other
source and destination operands are specified by the register. There are two kinds of shift
operations of arithmetic and logical shifts. Table 3.27 shows the variation of this type of operation.
The correspondence between each operand and registers, except for immediate operands, is the
same as the ALU fixed-point operations as shown in table 3.21.
Table 3.27
Variation of Shift Operations
Mnemonic
Function
Source 1
Source 2
Destination
PSHA Sx, Sy, Dz
Arithmetic shift
Sx
Sy
Dz
PSHL Sx, Sy, Dz
Logical shift
Sx
Sy
Dz
PSHA #Imm1, Dz Arithmetic shift with
immediate.
Dz
Imm1
Dz
PSHL #Imm2, Dz
Logical shift with
immediate.
Dz
Imm2
Dz
–32 <= Imm1 <= +32, –16 <= Imm2 <= +16
(1)
Arithmetic Shift
Figure 3.17 shows the arithmetic shift operation flow.
DSR
GT
Z
N
V
DC
Updated
39
32 31
16 15
0
Sy
39
32 31
16 15
0
0
Shift out
Shift out
(MSB copy)
Ignored
Left shift
Right shift
39
32 31
23 22
16
Imm1
60
15
0
Shift amount data
(source 2)
>=0
<0
+32 to -32
Figure 3.17 Arithmetic Shift Operation Flow



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