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SH7721 bảng dữ liệu(PDF) 197 Page - Renesas Technology Corp

tên linh kiện SH7721
Giải thích chi tiết về linh kiện  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
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Section 3 DSP Operating Unit
Rev. 3.00 Jan. 18, 2008 Page 135 of 1458
REJ09B0033-0300
3.5.7
Fixed-Point Multiply Operation
Figure 3.16 shows the multiply operation flow. Table 3.25 shows the variation of this type of
operation and table 3.26 shows the correspondence between each operand and registers. The
multiply operation of the DSP unit is single-word signed single-precision multiplication. These
operations are executed in the DSP stage, as shown in figure 3.10. The DSP stage is the same
stage as the MA stage in which memory access is performed.
If a double-precision multiply operation is needed, the CPU standard double-word multiply
instructions can be made of use.
39
31
0
Source 1
S
39
31
1 0
MAC
Ignored
S0
39
31
0
Source 2
S
Destination
0
Figure 3.16 Fixed-Point Multiply Operation Flow
Table 3.25
Variation of Fixed-Point Multiply Operation
Mnemonic
Function
Source 1
Source 2
Destination
PMULS
Signed multiplication
Se
Sf
Dg



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