SH7708 datasheet(213/633 Pages) RENESAS

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195

Area 0: H'00000000

Area 1: H'04000000

Area 2: H'08000000

Area 3: H'0C000000

Area 4: H'10000000

Area 5: H'14000000

The PCMCIA interface is for

the memory card only

Only DRAM with a 16-bit bus

can be connected to area 2

The PCMCIA interface is shared

by the memory and I/O card

Area 6: H'18000000

Normal memory/

burst ROM

Normal memory

Normal memory/

synchronous DRAM, DRAM

Normal memory/synchronous

DRAM, DRAM, pseudo-SRAM

Normal memory

Normal memory/

burst ROM/PCMCIA

Normal memory/

burst ROM/PCMCIA

Figure 10.3 Physical Space Allocation

Memory Size: The memory size in the SH7708Series can be set for each area. In area 0, an

external pin can be used to select byte (8 bits), word (16 bits), or longword (32 bits). The

relationship between the external pins (MD4 and MD3) and the bus width after a power-on reset is

as follows.

MD4

MD3

Bus Width

Reserved (do not set)

8 bits

16 bits

32 bits

For areas 1–6, byte, word, and longword may be chosen for the bus width using bus control

used. When the DRAM or pseudo-SRAM interfaces are used, word or longword can be chosen as

the bus width using the individual memory control register (MCR). Set the bus width to longword

with MCR for synchronous DRAM interfaces.

When area 2 is used as a DRAM area, set the bus widths of areas 2 and 3 to word. When areas 5

and 6 are used as PCMCIA interfaces, set the bus width to byte or word. When using the port

function, set each of the bus widths to byte or word for all areas. For more information, see section

10.2.2, Bus Control Register 2 (BCR2), and section 10.2.5, Individual Memory Control Register

(MCR).

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