SH7708 datasheet(81/633 Pages) RENESAS

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Virtual address

Way 0–3

VPN(31–17)

VPN(11–10)

ASID(7–0)

Address array

Data array

PPN(31–10) PR(1–0) SZ C

D SH

Index

Figure 3.7 TLB Indexing (IX = 0)

3.3.3

TLB Address Comparison

The results of address comparison determine whether a specific virtual page number is registered

in the TLB. The virtual page number of the virtual address that accesses external memory is

compared to the virtual page number of the indexed TLB entry. The ASID within the PTEH is

compared to the ASID of the indexed TLB entry. All four ways are searched simultaneously. If the

compared values match, and the indexed TLB entry is valid (V bit = 1), the hit is registered.

It is necessary to have the software ensure that TLB hits do not occur simultaneously in more than

one way, as hardware operation is not guaranteed if this happens. For example, if there are two

identical TLB entries with the same VPN and a setting is made such that a TLB hit is made only

by a process with ASID = H'FF when one is in the shared state (SH = 1) and the other in the non-

shared state (SH = 0), then if the ASID in PHE is set to H'FF, there is a possibility of simultaneous

TLB hits in both these ways. It is therefore necessary to ensure that this kind of setting is not made

by the software.

The object compared varies depending on the page management information (SZ, SH) in the TLB

entry. It also varies depending on whether the system supports multiple virtual memory or single

virtual memory.

The page size information determines whether VPN (11–10) is compared. VPN (11–10) is

compared for 1-kbyte pages (SZ = 0) but not for 4-kbyte pages (SZ = 1).

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