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3819 bảng dữ liệu(PDF) 42 Page - Renesas Technology Corp |
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42 / 218 page ![]() 28 3819 Group SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS q Setting of Serial I/O Automatic Transfer Timing The timing of serial I/O automatic transfer is set with the serial I/O1 control register (address 001916) and the serial I/O auto- matic transfer interval register (address 001C16). The serial I/O1 control register sets the transfer clock speed, and the serial I/O automatic transfer interval register sets the serial I/O automatic transfer interval. This setting of transfer in- terval is valid only when selecting the internal clock as the clock source. q Start of Serial I/O Automatic Transfer Automatic transfer mode is set by writing “1” to the bit 0 of the serial I/O automatic transfer control register (address 001A16), then automatic transfer starts by writing “1” to the bit 1. The bit 1 of the serial I/O automatic transfer control register is always “1” during automatic transfer; writing “0” can complete the serial I/O automatic transfer. q Operation in Serial I/O Automatic Transfer Modes There are two modes for serial I/O automatic transfer: full du- plex mode and transmit-only mode. Either internal or external clock can be selected for each of these modes. (2.1) Operation in Full Duplex Mode In full duplex mode, data can be transmitted and received at the same time. Data in the automatic transfer RAM is transmitted in sequence in accordance with the serial I/O automatic transfer data pointer and simultaneously reception data is written to the auto- matic transfer RAM. The transfer timing of each bit is the same as that in ordinary op- eration mode, and the transfer clock stops at “H” after eight transfer clocks are counted. When selecting the internal clock, the transfer clock remains at “H” for the time set with the serial I/O automatic transfer interval regis- ter, then the data at the next address (the address is indicated with the serial I/O automatic transfer data pointer) are transferred. If when selecting the external clock, the setting of the automatic transfer interval register is invalid, so control the transfer clock ex- ternally. The last data transfer completes when the contents of the serial I/O automatic transfer pointer reach “0016”. At that point, the serial I/O automatic transfer interrupt request bit is set to “1” and the bit 1 of the serial I/O automatic transfer control register is cleared to “0” to complete the serial I/O automatic transfer. (2.2) Operation in Transmit-Only Mode The operation in transmit-only mode is the same as that in full du- plex mode, except for that data is not transferred from the serial I/O1 register to the serial I/O automatic transfer RAM. Fig. 19 Serial I/O1 register transfer operation in full duplex mode • • • DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 Transfer clock DI1 DI0 DO7 DO6 DO5 DO4 DO3 DO2 DI2 DI1 DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 DO7 DO6 DO5 DO4 DO3 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DI0 Transfer direction selection bit LSB first (SC15 = “0” ) : MSB MSB first (SC15 = “1” ) : LSB LSB MSB SOUT SIN Serial I/O1 register DI0 |
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