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SH7021 bảng dữ liệu(PDF) 31 Page - Renesas Technology Corp |
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SH7021 bảng dữ liệu(HTML) 31 Page - Renesas Technology Corp |
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31 / 509 page ![]() 10 RENESAS Table 1.3 Pin Functions (cont) Type Symbol Pin No. I/O Name and Function Operating mode control MD2, MD1, MD0 79–77 I Mode select: Selects the operating mode. Do not change these inputs while the chip is operating. The following table lists the possible operating modes and their corresponding MD2–MD0 values. MD2 MD1 MD0 Operating Mode On-chip ROM Bus Size in Area 0 0 0 0 MCU mode Disabled 8 bits 0 0 1 16 bits 0 1 0 Enabled* 1 0 1 1 (Reserved) 10 0 10 1 11 0 1 1 1 PROM mode* 2 Interrupts NMI 74 I Nonmaskable interrupt: Nonmaskable interrupt request signal. The rising or falling edge can be selected for signal detection. IRQ0– IRQ7 65–68, 97–100 I Interrupt request 0–7: Maskable interrupt request signals. Level input or edge-triggered input can be selected. IRQOUT 61 O Slave interrupt request output: Indicates occurrence of an interrupt while the bus is released. Address bus A21–A0 45–42, 40, 39, 37–33, 31–25, 23–20 O Address bus: Outputs addresses. Data bus AD15– AD0 19–16, 14, 12-5, 3–1 I/O Data bus: 16-bit bidirectional data bus that is multiplexed with the lower 16 bits of the address bus. DPH 64 I/O Upper data bus parity: Parity data for D15–D8. DPL 62 I/O Lower data bus parity: Parity data for D7–D0. Bus control WAIT 54 I Wait: Requests the insertion of wait states (TW) into the bus cycle when the external address space is accessed. Notes : 1.Use prohibited in the SH7020 Romless version. 2.Can only be used in the SH7021 ZTAT version. |
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